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» Processor Architectures for Ontogenesis
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ICPP
1987
IEEE
15 years 10 months ago
Performance of VLSI Engines for Lattice Computations
Abstract. We address the problem of designing and building efficient custom Vl.Sl-besed processors to do computations on large multi-dimensional lattices. The design tradeoffs for ...
Steven D. Kugelmass, Kenneth Steiglitz, Richard K....
MVA
1992
170views Computer Vision» more  MVA 1992»
15 years 7 months ago
An Host-Target Environment for Real Time Image Processing
The development of a real time image processing on a specific architecture is always restricting for the user who must master all the elementary mechanisms of the machine. Such sp...
M. Pizzocaro
SIAMCOMP
2000
118views more  SIAMCOMP 2000»
15 years 6 months ago
Constructive, Deterministic Implementation of Shared Memory on Meshes
This paper describes a scheme to implement a shared address space of size m on an n-node mesh, with m polynomial in n, where each mesh node hosts a processor and a memory module. A...
Andrea Pietracaprina, Geppino Pucci, Jop F. Sibeyn
TVLSI
2008
150views more  TVLSI 2008»
15 years 6 months ago
Data Memory Subsystem Resilient to Process Variations
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance o...
M. Bennaser, Yao Guo, Csaba Andras Moritz
PVLDB
2010
175views more  PVLDB 2010»
15 years 5 months ago
Dynamic Join Optimization in Multi-Hop Wireless Sensor Networks
To enable smart environments and self-tuning data centers, we are developing the Aspen system for integrating physical sensor data, as well as stream data coming from machine logi...
Svilen R. Mihaylov, Marie Jacob, Zachary G. Ives, ...