Sciweavers

2700 search results - page 223 / 540
» Processor Architectures for Ontogenesis
Sort
View
CSREAESA
2006
15 years 8 months ago
Power Optimization of Interconnection Networks for Transport Triggered Architecture
Transport triggered architecture (TTA) has been shown to provide an efficient way to design application specific instruction set processors. However, the interconnection network of...
Xue-mi Zhao, Zhiying Wang
WIESS
2000
15 years 8 months ago
HP Caliper: An Architecture for Performance Analysis Tools
HP Caliper is an architecture for software developer tools that deal with executable (binary) programs. It provides a common framework that allows building of a wide variety of to...
Robert Hundt
IPPS
2000
IEEE
15 years 11 months ago
Performance of On-Chip Multiprocessors for Vision Tasks
Abstract. Computer vision is a challenging data intensive application. Currently, superscalar architectures dominate the processor marketplace. As more transistors become available...
Yongwha Chung, K. Park, W. Hahn, Neungsoo Park, Vi...
ISLPED
1999
ACM
100views Hardware» more  ISLPED 1999»
15 years 11 months ago
Selective instruction compression for memory energy reduction in embedded systems
We propose a technique for reducing the energy required by rmware code to execute on embedded systems. The method is based on the idea of compressing the most commonly executed in...
Luca Benini, Alberto Macii, Enrico Macii, Massimo ...
IFIP
1998
Springer
15 years 10 months ago
Migrating Objects in Electronic Commerce Applications
Electronic Commerce is a field of application that is distributed by nature where different parties share information and work concurrently and cooperatively on objects, potential...
Marko Boger