2700 search results - page 219 / 540 » Processor Architectures for Ontogenesis |
132
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CGO
2008
IEEE
16 years 1 months ago
2008
IEEE
Vector-thread (VT) architectures exploit multiple forms of parallelism simultaneously. This paper describes a compiler for the Scale VT architecture, which takes advantage of the ...
171
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SBACPAD
2007
IEEE
16 years 25 days ago
2007
IEEE
One way to exploit Thread Level Parallelism (TLP) is to use architectures that implement novel multithreaded execution models, like Scheduled DataFlow (SDF). This latter model pro...
164
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VLSID
2007
IEEE
16 years 25 days ago
2007
IEEE
In recent years, research and development in the field of machine learning and classification techniques have gained paramount importance. The future generation of intelligent e...
140
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ICPP
2000
IEEE
15 years 11 months ago
2000
IEEE
This paper proposes a parallel architecture for quadtreebased fractal image coding. This architecture is capable of performing the fractal image coding based on quadtree partition...
154
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EURODAC
1994
IEEE
15 years 10 months ago
1994
IEEE
System-levelpartitioning assigns functionalobjects such as tasks or code segments to system-level components such as o-the-shelf processors or application-speci c architectures in...