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EUROPAR
2007
Springer
16 years 22 days ago
Toward Scalable Matrix Multiply on Multithreaded Architectures
We show empirically that some of the issues that affected the design of linear algebra libraries for distributed memory architectures will also likely affect such libraries for s...
Bryan Marker, Field G. Van Zee, Kazushige Goto, Gr...
ISCAS
2003
IEEE
144views Hardware» more  ISCAS 2003»
15 years 12 months ago
A flexible global readout architecture for an analogue SIMD vision chip
A new vision chip, SCAMP-2, has been developed in a 0.35µm CMOS technology. In this paper, the design of the chip is presented, with particular emphasis on its readout architectu...
Piotr Dudek
ISCAS
2003
IEEE
93views Hardware» more  ISCAS 2003»
15 years 12 months ago
A rescheduling and fast pipeline VLSI architecture for lifting-based discrete wavelet transform
In this paper, we propose a fast pipeline VLSI architecture for 1D lifting-based discrete wavelet transform (DWT). This design method merges the filtering steps called the predict...
Bing-Fei Wu, Chung-Fu Lin
ETS
2010
IEEE
130views Hardware» more  ETS 2010»
15 years 7 months ago
A distributed architecture to check global properties for post-silicon debug
Post-silicon validation and debug, or ensuring that software executes correctly on the silicon of a multi-processor system-on-chip (MPSOC) is complicated, as it involves checking g...
Erik Larsson, Bart Vermeulen, Kees Goossens
ICCD
2002
IEEE
113views Hardware» more  ICCD 2002»
16 years 3 months ago
System-Architectures for Sensor Networks Issues, Alternatives, and Directions
Our goal is to identify the key architectural and design issues related to Sensor Networks (SNs), evaluate the proposed solutions, and to outline the most challenging research dir...
Jessica Feng, Farinaz Koushanfar, Miodrag Potkonja...