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» Processor Architectures for Ontogenesis
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DATE
2003
IEEE
105views Hardware» more  DATE 2003»
15 years 12 months ago
Detecting Soft Errors by a Purely Software Approach: Method, Tools and Experimental Results
In this paper is described a software technique allowing to detect soft errors occurring in processor-based digital architectures. The detection mechanism is based on a set of rul...
B. Nicolescu, Raoul Velazco
FPL
2006
Springer
115views Hardware» more  FPL 2006»
15 years 10 months ago
Executing Hardware as Parallel Software for Picoblaze Networks
Multi-processor architectures have gained interest recently because of their ability to exploit programmable silicon parallelism at acceptable power-efficiency figures. Despite th...
Pengyuan Yu, Patrick Schaumont
DAC
1995
ACM
15 years 10 months ago
Code Optimization Techniques for Embedded DSP Microprocessors
—We address the problem of code optimization for embedded DSP microprocessors. Such processors (e.g., those in the TMS320 series) have highly irregular datapaths, and conventiona...
Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Stev...
DAC
2010
ACM
15 years 6 months ago
Automatic multithreaded pipeline synthesis from transactional datapath specifications
We present a technique to automatically synthesize a multithreaded in-order pipeline from a high-level unpipelined datapath specification. This work extends the previously propose...
Eriko Nurvitadhi, James C. Hoe, Shih-Lien Lu, Timo...
CORR
2008
Springer
162views Education» more  CORR 2008»
15 years 6 months ago
Accelerating Scientific Computations with Mixed Precision Algorithms
On modern architectures, the performance of 32-bit operations is often at least twice as fast as the performance of 64-bit operations. By using a combination of 32-bit and 64-bit ...
Marc Baboulin, Alfredo Buttari, Jack Dongarra, Jak...