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» Processor Architectures for Ontogenesis
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SP
2008
IEEE
122views Security Privacy» more  SP 2008»
15 years 6 months ago
Large-scale phylogenetic analysis on current HPC architectures
Abstract. Phylogenetic inference is considered a grand challenge in Bioinformatics due to its immense computational requirements. The increasing popularity and availability of larg...
Michael Ott, Jaroslaw Zola, Srinivas Aluru, Andrew...
ICCD
2004
IEEE
100views Hardware» more  ICCD 2004»
16 years 3 months ago
A Minimal Dual-Core Speculative Multi-Threading Architecture
Speculative Multi-Threading (SpMT) can improve single-threaded application performance using the multiple thread contexts available in current processors. We propose a minimal SpM...
Srikanth T. Srinivasan, Haitham Akkary, Tom Holman...
ISSS
1995
IEEE
161views Hardware» more  ISSS 1995»
15 years 10 months ago
Synthesis of pipelined DSP accelerators with dynamic scheduling
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...
DAC
1996
ACM
15 years 10 months ago
FADIC: Architectural Synthesis applied in IC Design
This paper discusses the design of a chip using architectural synthesis. The chip, FADIC, is applied in Digital Audio Broadcasting (DAB) receivers. It shows that architectural syn...
J. Huisken, F. Welten
DAC
2000
ACM
16 years 7 months ago
MorphoSys: case study of a reconfigurable computing system targeting multimedia applications
In this paper, we present a case study for the design, programming and usage of a reconfigurable system-on-chip, MorphoSys, which is targeted at computation-intensive applications...
Hartej Singh, Guangming Lu, Eliseu M. Chaves Filho...