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ICES
2003
Springer
101views Hardware» more  ICES 2003»
15 years 11 months ago
A Developmental Method for Growing Graphs and Circuits
A review is given of approaches to growing neural networks and electronic circuits. A new method for growing graphs and circuits using a developmental process is discussed. The met...
Julian F. Miller, Peter Thomson
APSEC
2002
IEEE
15 years 11 months ago
Contextual Matching of Software Library Components
Many automated programming environments construct software by integrating predefined components from a software library. A fundamental challenge in this process is to match the p...
Colin J. Fidge
DSN
2002
IEEE
15 years 11 months ago
A Portable and Fault-Tolerant Microprocessor Based on the SPARC V8 Architecture
The architecture and implementation of the LEON-FT processor is presented. LEON-FT is a fault-tolerant 32-bit processor based on the SPARC V8 instruction set. The processors toler...
Jiri Gaisler
ICCAD
2002
IEEE
100views Hardware» more  ICCAD 2002»
15 years 11 months ago
Optimal buffered routing path constructions for single and multiple clock domain systems
Shrinking process geometries and the increasing use of IP components in SoC designs give rise to new problems in routing and buffer insertion. A particular concern is that cross-c...
Soha Hassoun, Charles J. Alpert, Meera Thiagarajan
ICPR
2002
IEEE
15 years 11 months ago
Assembly of Puzzles Using a Genetic Algorithm
In this paper, we proposed a method for solving the rectangle piece jigsaw puzzle assembly problem. A shape of a piece is a rectangle, and a picture of a puzzle is only painted in...
Fubito Toyama, Yukihiro Fujiki, Kenji Shoji, Juich...