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IPPS
2005
IEEE
16 years 6 days ago
Effective Instruction Prefetching via Fetch Prestaging
As technological process shrinks and clock rate increases, instruction caches can no longer be accessed in one cycle. Alternatives are implementing smaller caches (with higher mis...
Ayose Falcón, Alex Ramírez, Mateo Va...
DATE
2003
IEEE
102views Hardware» more  DATE 2003»
15 years 12 months ago
G-MAC: An Application-Specific MAC/Co-Processor Synthesizer
: A modern special-purpose processor (e.g., for image and graphical applications) usually contains a set of instructions supporting complex multiply-operations. These instructions ...
Alex C.-Y. Chang, Wu-An Kuo, Allen C.-H. Wu, TingT...
CASES
2006
ACM
15 years 10 months ago
Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
Won So, Alexander G. Dean
BMCBI
2008
204views more  BMCBI 2008»
15 years 6 months ago
EST2uni: an open, parallel tool for automated EST analysis and database creation, with a data mining web interface and microarra
Background: Expressed sequence tag (EST) collections are composed of a high number of single-pass, redundant, partial sequences, which need to be processed, clustered, and annotat...
Javier Forment, Francisco Gilabert Villamón...
BMCBI
2006
131views more  BMCBI 2006»
15 years 6 months ago
The statistics of identifying differentially expressed genes in Expresso and TM4: a comparison
Background: Analysis of DNA microarray data takes as input spot intensity measurements from scanner software and returns differential expression of genes between two conditions, t...
Allan A. Sioson, Shrinivasrao P. Mane, Pinghua Li,...