6819 search results - page 949 / 1364 » Process Reuse Architecture |
195
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ICPR
2000
IEEE
16 years 8 months ago
2000
IEEE
Multi-valued neurons are the neural processing elements with complex-valued weights, huge functionality (it is possible to implement on the single neuron arbitrary mapping describ...
153
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DAC
2009
ACM
16 years 7 months ago
2009
ACM
Semiconductor design companies are in a continuous search for design tools that address the ever increasing chip design complexity coupled with strict time-to-market schedules and...
165
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
This paper presents a RTR FPGA embedded in a System on Chip fabricated in 130nm CMOS process. Various aspects of the design flow, from automation to floor-planning are discussed. ...
153
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DAC
2008
ACM
16 years 7 months ago
2008
ACM
Pattern matching relies on deterministic finite automata (DFA) to search for predefined patterns. While a bit-DFA method is recently proposed to exploit the parallelism in pattern...
165
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
Packet-switched networks on chip (NoC) have been advocated as a natural communication mechanism among the processing cores in future chip multiprocessors (CMP). However, electroni...