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ERSA
2009
147views Hardware» more  ERSA 2009»
15 years 4 months ago
Fault Avoidance in Medium-Grain Reconfigurable Hardware Architectures
Medium-grain reconfigurable hardware (MGRH) architectures represent a hybrid between the versatility of a field programmable gate array (FPGA) and the computational power of a cust...
Kylan Robinson, José G. Delgado-Frias
ICIP
2008
IEEE
16 years 1 months ago
Efficient spatial resolution reduction transcoding for H.264/AVC
In this paper, we present a spatial resolution reduction transcoding architecture for H.264/AVC, which extends open-loop transcoding with a low-complexity compensation technique i...
Jan De Cock, Stijn Notebaert, Kenneth Vermeirsch, ...
FCCM
2006
IEEE
108views VLSI» more  FCCM 2006»
16 years 28 days ago
A Reconfigurable Distributed Computing Fabric Exploiting Multilevel Parallelism
This paper presents a novel reconfigurable data flow processing architecture that promises high performance by explicitly targeting both fine- and course-grained parallelism. This...
Charles L. Cathey, Jason D. Bakos, Duncan A. Buell
EDOC
2003
IEEE
16 years 5 days ago
A Model-Driven Transformation Method
Model-driven architectures (MDA) separate the business or application logic from the underlying platform technology and represent this logic with precise semantic models. These mo...
Jana Koehler, Rainer Hauser, Shubir Kapoor, Freder...
SEC
2000
15 years 8 months ago
Improving Packet Filters Management through Automatic and Dynamic Schemes
: The development of complex access control architectures raises the problem of their management. In this article, we describe an architecture providing packet filters configuratio...
Olivier Paul, Maryline Laurent