6819 search results - page 382 / 1364 » Process Reuse Architecture |
181
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ICIP
1999
IEEE
16 years 8 months ago
1999
IEEE
In this paper, we present a VLSI architecture for separable 2-D Discrete Wavelet Transform (DWT). Based on 1-D DWT Recursive Pyramid Algorithm (RPA), a complete 2-D DWT output sch...
179
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ICCAD
2007
IEEE
16 years 3 months ago
2007
IEEE
—In this paper, we introduce a novel reconfigurable architecture, named 3D nFPGA, which utilizes 3D integration techniques and new nanoscale materials synergistically. The propos...
230
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HIPEAC
2009
Springer
16 years 1 months ago
2009
Springer
Heterogeneous architectures are currently widespread. With the advent of easy-to-program general purpose GPUs, virtually every recent desktop computer is a heterogeneous system. Co...
167
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ICIW
2009
IEEE
16 years 1 months ago
2009
IEEE
— Mobile peer to peer (P2P) computing is becoming a major revolution in computing owing to advances in computing power, network connectivity and storage capacity of mobile device...
214
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COMSWARE
2007
IEEE
16 years 1 months ago
2007
IEEE
- Many real-time distributed collaborative applications are emerging that require exchange of critical sensor data among geographically distant end users under resource-constrained...