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IPPS
2007
IEEE
16 years 1 months ago
A Study of Design Efficiency with a High-Level Language for FPGAs
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
Zain-ul-Abdin, Bertil Svensson
IJACTAICIT
2010
175views more  IJACTAICIT 2010»
15 years 4 months ago
Achieving CMMI Maturity Level 3 by Implementing FEAF Reference Models
The basic purpose of an Enterprise Architecture project is creating integrity among different enterprise components, including processes, systems, technologies, and etc. While CMM...
Fatemeh Kafili Kasmaee, Ramin Nassiri, Gholamreza ...
SAC
2006
ACM
16 years 21 days ago
A concurrent reactive Esterel processor based on multi-threading
Esterel is a concurrent synchronous language for developing reactive systems. As an alternative to the classical software and hardware synthesis paths, the reactive processing app...
Xin Li, Reinhard von Hanxleden
MODELS
2007
Springer
16 years 27 days ago
Architectural Aspects in UML
We propose a method for describing architectural aspects in UML and show how binding specifications are used to compose aspects with base models. UML classes, parts, ports, and c...
Jon Oldevik, Øystein Haugen
VISUALIZATION
1998
IEEE
15 years 11 months ago
A distributed blackboard architecture for interactive data visualization
In this paper we present a distributed blackboard architecture for scientific visualzation. We discuss our motivation,design and applicationof the architecture. The main advantage...
Robert van Liere, Jan Harkes, Wim C. de Leeuw