Sciweavers

6819 search results - page 281 / 1364
» Process Reuse Architecture
Sort
View
WSC
2008
15 years 9 months ago
A systems engineering process supporting the development of operational requirements driven federations
This paper proposes a systems engineering process utilizing the conceptual artifacts of the Model Driven Architecture (MDA) describing platform independent views of models to capt...
Andreas Tolk, Thomas G. Litwin, Robert H. Kewley
FPGA
2008
ACM
133views FPGA» more  FPGA 2008»
15 years 8 months ago
Vector processing as a soft-core CPU accelerator
The currently accepted method of accelerating applications in FPGA soft processor systems is to design a custom hardware accelerator. This paper suggests the alternative approach ...
Jason Yu, Guy Lemieux, Christopher Eagleston
SIGCOMM
2010
ACM
15 years 6 months ago
No more middlebox: integrate processing into network
Traditionally, in-network services like firewall, proxy, cache, and transcoders have been provided by dedicated hardware middleboxes. A recent trend has been to remove the middleb...
Jeongkeun Lee, Jean Tourrilhes, Puneet Sharma, Suj...
IPPS
2007
IEEE
16 years 29 days ago
Using Rewriting Logic to Match Patterns of Instructions from a Compiler Intermediate Form to Coarse-Grained Processing Elements
This paper presents a new and retargetable method to identify patterns of instructions with direct support in coarsegrained processing elements (PEs). The method uses a three-addr...
Carlos Morra, João M. P. Cardoso, Jürg...
ICANN
2007
Springer
16 years 25 days ago
Neural Network Processing for Multiset Data
Abstract. This paper introduces the notion of the variadic neural network (VNN). The inputs to a variadic network are an arbitrary-length list of n-tuples of real numbers, where n ...
Simon McGregor