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HPCA
2011
IEEE
14 years 10 months ago
A new server I/O architecture for high speed networks
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...
Guangdeng Liao, Xia Znu, Laxmi N. Bhuyan
IPPS
1998
IEEE
15 years 11 months ago
Replicated Shared Object Model for Edge Detection with Spiral Architecture
Edge detection in computer vision and image processing is a process which detects one kind of signi cant features appearing as discontinuities in intensities. A parallel edge detec...
Xiangjian He, Tom Hintz, Ury Szewcow
TCSV
2008
225views more  TCSV 2008»
15 years 6 months ago
Analysis and Efficient Architecture Design for VC-1 Overlap Smoothing and In-Loop Deblocking Filter
Abstract--In contrast to the macroblock-based in-loop deblocking filters, the filters of VC-1 perform all horizontal edges (for in-loop filtering) or vertical edges (for overlap sm...
Yen-Lin Lee, T. Q. Nguyen
WETICE
1998
IEEE
15 years 11 months ago
A Framework for Adaptive Process Modeling and Execution (FAME)
This paper describes the architecture and concept of operation of a Framework for Adaptive Process Modeling and Execution (FAME). The research addresses the absence of robust meth...
Perakath C. Benjamin, Madhav Erraguntla, Richard J...
AINA
2008
IEEE
16 years 1 months ago
WS-BPEL Process Compiler for Resource-Constrained Embedded Systems
Process management and workflow systems play an important role in the composition of services in business as well as automation environments. Processes are designed using tools a...
Hendrik Bohn, Andreas Bobek, Frank Golatowski