Sciweavers

6819 search results - page 151 / 1364
» Process Reuse Architecture
Sort
View
WISA
2007
Springer
16 years 15 days ago
A Compact Architecture for Montgomery Elliptic Curve Scalar Multiplication Processor
We propose a compact architecture of a Montgomery elliptic curve scalar multiplier in a projective coordinate system over GF(2m ). To minimize the gate area of the architecture, we...
Yong Ki Lee, Ingrid Verbauwhede
ASPDAC
2006
ACM
178views Hardware» more  ASPDAC 2006»
16 years 11 days ago
Hardware architecture design of an H.264/AVC video codec
Abstract—H.264/AVC is the latest video coding standard. It significantly outperforms the previous video coding standards, but the extraordinary huge computation complexity and m...
Tung-Chien Chen, Chung-Jr Lian, Liang-Gee Chen
ISSTA
2006
ACM
16 years 11 days ago
Towards an architectural approach for the dynamic and automatic composition of software components
In a component-based software system the components are specified, designed and implemented with the intention to be reused, and are assembled in various contexts in order to pro...
Antonio Bucchiarone, Andrea Polini, Patrizio Pelli...
ACSAC
2005
IEEE
16 years 1 days ago
Building a MAC-Based Security Architecture for the Xen Open-Source Hypervisor
We present the sHype hypervisor security architecture and examine in detail its mandatory access control facilities. While existing hypervisor security approaches aiming at high a...
Reiner Sailer, Trent Jaeger, Enriquillo Valdez, Ra...
FPL
2005
Springer
140views Hardware» more  FPL 2005»
15 years 12 months ago
A Configuration Memory Architecture for Fast Run-Time-Reconfiguration of FPGAs
This paper presents a configuration memory architecture that offers fast FPGA reconfiguration. The underlying principle behind the design is the use of fine-grained partial rec...
Usama Malik, Oliver Diessel