6819 search results - page 1166 / 1364 » Process Reuse Architecture |
145
click to vote
DATE
2007
IEEE
16 years 24 days ago
2007
IEEE
Networks-on-Chip (NoCs) have recently emerged as a scalable alternative to classical bus and point-to-point architectures. To date, performance evaluation of NoC designs is largel...
168
click to vote
ESCIENCE
2007
IEEE
16 years 24 days ago
2007
IEEE
: This paper describes the architecture and services developed by the GRANI project for the Australian Nanostructural Analysis Network Organization (NANO). The aim of GRANI was to ...
135
click to vote
FCCM
2007
IEEE
16 years 24 days ago
2007
IEEE
BLASTP is the most popular tool to perform comparative sequence analysis of protein sequences. An exponential increase in the size of protein sequence databases in recent years, h...
203
click to vote
FDL
2007
IEEE
16 years 24 days ago
2007
IEEE
Transaction level models (TLMs) can be constructed at t levels of abstraction, denoted as untimed (UT), cycle-approximate (CX), and cycle accurate (CA) in this paper. The choice o...
193
click to vote
GLOBECOM
2007
IEEE
16 years 24 days ago
2007
IEEE
Abstract— This paper theoretically analyzes cross-layer optimized design of transmit power allocation in distributed interference-limited wireless networks with asynchronously ac...