6819 search results - page 1130 / 1364 » Process Reuse Architecture |
223
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FPL
2010
Springer
15 years 4 months ago
2010
Springer
We demonstrate how Field Programmable Gate Arrays (FPGAs) may be used to address the computing challenges associated with assembling genome sequences from recent ultra-high-through...
157
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ICCAD
2010
IEEE
15 years 4 months ago
2010
IEEE
Clock skew minimization has been an important design constraint. However, due to the complexity of Process, Voltage, and Temperature (PVT) variations, the minimization of clock sk...
181
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IEEECIT
2010
IEEE
15 years 4 months ago
2010
IEEE
There are two avenues for many-core machines to gain higher performance: increasing the number of processors, and increasing the number of vector units in one SIMD processor. A tru...
206
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HIPC
2009
Springer
15 years 4 months ago
2009
Springer
Stream computing research is moving from terascale to petascale levels. It aims to rapidly analyze data as it streams in from many sources and make decisions with high speed and a...
200
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JNCA
2011
15 years 1 months ago
2011
Popular Internet applications deploy a multi-tier architecture, with each tier provisioning a certain functionality to its preceding tier. In this paper, we address the challengin...