6819 search results - page 1027 / 1364 » Process Reuse Architecture |
168
Voted
ICCAD
2006
IEEE
16 years 3 months ago
2006
IEEE
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
210
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AINA
2009
IEEE
16 years 1 months ago
2009
IEEE
— Mobile learning applications introduce a new degree of ubiquitousness in the learning process. There is a new generation of ICT-powered mobile learning experiences that exist i...
174
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EDBT
2009
ACM
16 years 1 months ago
2009
ACM
Business Intelligence (BI) refers to technologies, tools, and practices for collecting, integrating, analyzing, and presenting large volumes of information to enable better decisi...
184
Voted
IPPS
2009
IEEE
16 years 1 months ago
2009
IEEE
In many scientific applications, significant time is spent tuning codes for a particular highperformance architecture. Tuning approaches range from the relatively nonintrusive (...
191
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CF
2009
ACM
16 years 1 months ago
2009
ACM
As we reach the limits of single-core computing, we are promised more and more cores in our systems. Modern architectures include many performance counters per core, but few or no...