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ISQED
2002
IEEE
83views Hardware» more  ISQED 2002»
15 years 12 months ago
A Hybrid BIST Architecture and Its Optimization for SoC Testing
This paper presents a hybrid BIST architecture and methods for optimizing it to test systems-on-chip in a cost effective way. The proposed self-test architecture can be implemente...
Gert Jervan, Zebo Peng, Raimund Ubar, Helena Kruus
FPL
2009
Springer
105views Hardware» more  FPL 2009»
15 years 11 months ago
Improving the quality of a Physical Unclonable Function using configurable Ring Oscillators
A silicon Physical Unclonable Function (PUF), which is a die-unique challenge-response function, is an emerging hardware primitive for secure applications. It exploits manufacturi...
Abhranil Maiti, Patrick Schaumont
LSSC
2001
Springer
15 years 11 months ago
An Improved Monte Carlo Algorithm for Elastic Electron Backscattering from Surfaces
The problen of the backscattering of electrons from metal targets is subject of extensive theoreticel and experimental work in surface analysis. We are interested in the angular di...
Ivan Dimov, Emanouil I. Atanassov, Mariya K. Durch...
ICRA
2000
IEEE
102views Robotics» more  ICRA 2000»
15 years 11 months ago
Deformation Transition Graphs in Forming Operations of Rheological Objects
Manipulative operations of rheological objects can befound in many industrial fields such as food industry and medical product industry. Automatic operations of rheological object...
Shinichi Tokumoto, Yoshiaki Fujita, Shinichi Hirai
ITC
2000
IEEE
68views Hardware» more  ITC 2000»
15 years 11 months ago
Current ratios: a self-scaling technique for production IDDQ testing
The use of a single pass/fail threshold for IDDQ testing is unworkable as chip background currents increase to the point where they exceed many defect currents. This paper describ...
Peter C. Maxwell, Pete O'Neill, Robert C. Aitken, ...
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