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PLDI
2003
ACM
15 years 12 months ago
Compile-time dynamic voltage scaling settings: opportunities and limits
With power-related concerns becoming dominant aspects of hardware and software design, significant research effort has been devoted towards system power minimization. Among run-t...
Fen Xie, Margaret Martonosi, Sharad Malik
IWMM
2010
Springer
118views Hardware» more  IWMM 2010»
15 years 11 months ago
Speculative parallelization using state separation and multiple value prediction
With the availability of chip multiprocessor (CMP) and simultaneous multithreading (SMT) machines, extracting thread level parallelism from a sequential program has become crucial...
Chen Tian, Min Feng, Rajiv Gupta
PLDI
1999
ACM
15 years 11 months ago
Load-Reuse Analysis: Design and Evaluation
Load-reuse analysis finds instructions that repeatedly access the same memory location. This location can be promoted to a register, eliminating redundant loads by reusing the re...
Rastislav Bodík, Rajiv Gupta, Mary Lou Soff...
ENTCS
2006
128views more  ENTCS 2006»
15 years 6 months ago
Web Verification: Perspective and Challenges
The Web poses novel and interesting problems for both programming language design and verification--and their intersection. This paper provides a personal outline of one thread of...
Shriram Krishnamurthi
AB
2007
Springer
15 years 10 months ago
Efficient Haplotype Inference with Pseudo-boolean Optimization
Abstract. Haplotype inference from genotype data is a key computational problem in bioinformatics, since retrieving directly haplotype information from DNA samples is not feasible ...
Ana Graça, João Marques-Silva, In&ec...