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ASPDAC
2008
ACM
106views Hardware» more  ASPDAC 2008»
15 years 7 months ago
Verifying full-custom multipliers by Boolean equivalence checking and an arithmetic bit level proof
—In this paper we describe a practical methodology to formally verify highly optimized, industrial multipliers. We a multiplier description language which abstracts from low-leve...
Udo Krautz, Markus Wedler, Wolfgang Kunz, Kai Webe...
CODES
2008
IEEE
16 years 29 days ago
You can catch more bugs with transaction level honey
In this special session we explore holistic approaches to hardware/software debug that use or integrate transaction level models (TLMs). We present several TLM-based approaches to...
Miron Abramovici, Kees Goossens, Bart Vermeulen, J...
VRML
2000
ACM
15 years 10 months ago
Using VRML in construction industry applications
This paper describes initial research using the Virtual Reality Modeling Language (VRML97) in construction industry applications. The modeling of steel structures and construction...
Robert Lipman, Kent Reed
ENTCS
2008
90views more  ENTCS 2008»
15 years 6 months ago
Formal Verification of Websites
In this paper, a model for websites is presented. The model is well-suited for the formal verification of dynamic as well as static properties of the system. A website is defined ...
Sonia Flores, Salvador Lucas, Alicia Villanueva
WWW
2006
ACM
16 years 7 months ago
A framework for XML data streams history checking and monitoring
The need of formal verification is a problem that involves all the fields in which sensible data are managed. In this context the verification of data streams became a fundamental...
Alessandro Campi, Paola Spoletini