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ATAL
2006
Springer
15 years 10 months ago
Designing agent chips
We outline meta-encoding schemas for compiling nonmonotonic logic theories into Verilog HDL (Hardware Description Language) descriptions. These descriptions can be synthesized int...
Insu Song, Guido Governatori
KI
2008
Springer
15 years 6 months ago
Fusing DL Reasoning with HTN Planning
We describe a method for cascading Description Logic (DL) representation and reasoning on the one hand, and HTN action planning on the other. The planning domain description as wel...
Ronny Hartanto, Joachim Hertzberg
LFCS
2009
Springer
16 years 1 months ago
Completeness Results for Memory Logics
Memory logics are a family of modal logics in which standard relational structures are augmented with data structures and additional operations to modify and query these structure...
Carlos Areces, Santiago Figueira, Sergio Mera
IJCAI
1989
15 years 7 months ago
On the Declarative Semantics of Inheritance Networks
Usually, semantics of inheritance networks is specified indirectly through a translation into one of the standard logical formalisms. Since such translation involves an algorithmi...
Krishnaprasad Thirunarayan, Michael Kifer, David S...
JELIA
2004
Springer
15 years 12 months ago
Computing the Least Common Subsumer w.r.t. a Background Terminology
Methods for computing the least common subsumer (lcs) are usually restricted to rather inexpressive Description Logics (DLs) whereas existing knowledge bases are written in very e...
Franz Baader, Baris Sertkaya, Anni-Yasmin Turhan