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152
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SPAA
2009
ACM
16 years 7 months ago
2009
ACM
We consider the setting of a multiprocessor where the speeds of the m processors can be individually scaled. Jobs arrive over time and have varying degrees of parallelizability. A...
174
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SPAA
2009
ACM
16 years 7 months ago
2009
ACM
Transactional memory (TM) eliminates many problems associated with lock-based synchronization. Over recent years, much progress has been made in software and hardware implementati...
214
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PODC
2009
ACM
16 years 7 months ago
2009
ACM
We analyze the performance of protocols for load balancing in distributed systems based on no-regret algorithms from online learning theory. These protocols treat load balancing a...
167
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HPCA
2009
IEEE
16 years 7 months ago
2009
IEEE
As the last-level on-chip caches in chip-multiprocessors increase in size, the physical locality of on-chip data becomes important for delivering high performance. The non-uniform...
170
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HPCA
2009
IEEE
16 years 7 months ago
2009
IEEE
Linked data structure (LDS) accesses are critical to the performance of many large scale applications. Techniques have been proposed to prefetch such accesses. Unfortunately, many...