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IEEEPACT
2002
IEEE
15 years 11 months ago
Optimizing Loop Performance for Clustered VLIW Architectures
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
Yi Qian, Steve Carr, Philip H. Sweany
MPC
2010
Springer
181views Mathematics» more  MPC 2010»
15 years 11 months ago
Process Algebras for Collective Dynamics
d Abstract) Jane Hillston Laboratory for Foundations of Computer Science, The University of Edinburgh, Scotland Quantitative Analysis Stochastic process algebras extend classical p...
Jane Hillston
ICS
2001
Tsinghua U.
15 years 11 months ago
Multiplex: unifying conventional and speculative thread-level parallelism on a chip multiprocessor
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
Chong-liang Ooi, Seon Wook Kim, Il Park, Rudolf Ei...
IEEEPACT
2000
IEEE
15 years 11 months ago
A Lightweight Algorithm for Dynamic If-Conversion during Dynamic Optimization
Dynamic Optimization is an umbrella term that refers to any optimization of software that is performed after the initial compile time. It is a complementary optimization opportuni...
Kim M. Hazelwood, Thomas M. Conte
IPPS
1999
IEEE
15 years 11 months ago
The Impact of Memory Hierarchies on Cluster Computing
Using off-the-shelf commodity workstations and PCs to build a cluster for parallel computing has become a common practice. A choice of a cost-effective cluster computing platform ...
Xing Du, Xiaodong Zhang