Sciweavers

12943 search results - page 2004 / 2589
» Predicting When Not to Predict
Sort
View
NOMS
2008
IEEE
16 years 1 months ago
A novel approach to bottleneck analysis in networks
—In this paper∗ , we devise a novel method for bottleneck analysis of UDP networks based on the concept of network utility maximization. To determine the losses on the links in...
Nikhil Shetty, Assane Gueye, Jean C. Walrand
P2P
2008
IEEE
16 years 1 months ago
Incentives Against Hidden Action in QoS Overlays
Peer-to-peer networks providing QoS-enabled services are sensitive to hidden action situations, where the actions of a server peer are hidden from the peers who receive services f...
Raul Landa, Miguel Rio, David Griffin, Richard G. ...
RTAS
2008
IEEE
16 years 1 months ago
A Modular Worst-case Execution Time Analysis Tool for Java Processors
Recent technologies such as the Real-Time Specification for Java promise to bring Java’s advantages to real-time systems. While these technologies have made Java more predictab...
Trevor Harmon, Martin Schoeberl, Raimund Kirner, R...
SAINT
2008
IEEE
16 years 1 months ago
Matrix Routing -- An Interference Range Insensitive Routing Protocol for Wireless Sensor Networks
Interference ranges can dramatically affect the throughput in wireless sensor networks. While the transmission range defines the maximum physical range of a radio signal the inter...
Monty Beuster, Michael Beigl, Daniel Röhr, Ti...
SBACPAD
2008
IEEE
170views Hardware» more  SBACPAD 2008»
16 years 1 months ago
Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
James Poe, Chang-Burm Cho, Tao Li
« Prev « First page 2004 / 2589 Last » Next »