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185
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ISCAS
2007
IEEE
16 years 29 days ago
2007
IEEE
— Due to continuous technology scaling, the reduction of nodal capacitances and the lowering of power supply voltages result in an ever decreasing minimal charge capable of upset...
158
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DATE
2006
IEEE
16 years 23 days ago
2006
IEEE
In traditional parallel co-simulation approaches, the simulation speed is heavily limited by time synchronization overhead between simulators and idle time caused by data dependen...
172
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APCSAC
2005
IEEE
16 years 9 days ago
2005
IEEE
In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than...
204
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HAPTICS
2005
IEEE
16 years 9 days ago
2005
IEEE
An analytical model for cutting of a plate of material with a pair of scissors is presented in terms of concepts of contact and fracture mechanics. The forces of contact between t...
165
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IPPS
2005
IEEE
16 years 8 days ago
2005
IEEE
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...