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149
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DATE
2010
IEEE
15 years 11 months ago
2010
IEEE
—Recent developments have shown the possibility of leveraging silicon nanophotonic technologies for chip-scale interconnection fabrics that deliver high bandwidth and power effi...
153
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DATE
2010
IEEE
15 years 11 months ago
2010
IEEE
: Scaling down in very deep submicron (VDSM) technologies increases the delay, power consumption of on-chip interconnects, while the reliability and yield decrease. In high perform...
155
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ISCA
2010
IEEE
15 years 11 months ago
2010
IEEE
Previous research has shown that Staged Execution (SE), i.e., dividing a program into segments and executing each segment at the core that has the data and/or functionality to bes...
165
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ISCA
2010
IEEE
15 years 11 months ago
2010
IEEE
Power consumption has become a major constraint in the design of processors today. To optimize a processor for energyefficiency requires an examination of energy-performance trade...
155
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PLDI
2010
ACM
15 years 11 months ago
2010
ACM
Single thread performance remains an important consideration even for multicore, multiprocessor systems. As a result, techniques for improving single thread performance using mult...