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IPPS
2008
IEEE
16 years 24 days ago
Build to order linear algebra kernels
—The performance bottleneck for many scientific applications is the cost of memory access inside linear algebra kernels. Tuning such kernels for memory efficiency is a complex ...
Jeremy G. Siek, Ian Karlin, Elizabeth R. Jessup
MICRO
2008
IEEE
159views Hardware» more  MICRO 2008»
16 years 23 days ago
Copy or Discard execution model for speculative parallelization on multicores
The advent of multicores presents a promising opportunity for speeding up sequential programs via profile-based speculative parallelization of these programs. In this paper we pr...
Chen Tian, Min Feng, Vijay Nagarajan, Rajiv Gupta
SIPS
2008
IEEE
16 years 23 days ago
Multi-mode sub-Nyquist rate digital-to-analog conversion for direct waveform synthesis
This paper describes the sub-Nyquist rate digital-to-analog conversion technique for a direct waveform synthesis (DWS) transmitter. IEEE 802.22 TV band Cognitive Radio (CR) transm...
Stanley Yuan-Shih Chen, Nam-Seog Kim, Jan M. Rabae...
ACSAC
2007
IEEE
16 years 22 days ago
Channels: Runtime System Infrastructure for Security-Typed Languages
Security-typed languages (STLs) are powerful tools for provably implementing policy in applications. The programmer maps policy onto programs by annotating types with information ...
Boniface Hicks, Tim Misiak, Patrick McDaniel
COMSWARE
2007
IEEE
16 years 22 days ago
Impact of Network Dynamics on Tardiness of Data in Sensor Networks
- Impact of random delays and losses in sensor networks manifests in the form of tardiness of data used for processing at the sink nodes. The age of data used by the end applicatio...
Tarun Banka, Anura P. Jayasumana