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CODES
2011
IEEE
14 years 6 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu
SC
2005
ACM
16 years 4 days ago
Performance-constrained Distributed DVS Scheduling for Scientific Applications on Power-aware Clusters
Left unchecked, the fundamental drive to increase peak performance using tens of thousands of power hungry components will lead to intolerable operating costs and failure rates. H...
Rong Ge, Xizhou Feng, Kirk W. Cameron
ICRA
2002
IEEE
75views Robotics» more  ICRA 2002»
15 years 11 months ago
First Experiment in Sun-Synchronous Exploration
Sun-synchronous exploration is accomplished by reasoning about sunlight: where the Sun is in the sky, where and when shadows will fall, and how much power can be obtained through ...
David Wettergreen, M. Bernardine Dias, Benjamin Sh...
RECOSOC
2007
118views Hardware» more  RECOSOC 2007»
15 years 8 months ago
A NoC-based Infrastructure to Enable Dynamic Self Reconfigurable Systems
Electronic equipments with higher performance, lower power consumption, and smaller size motivate the research for more efficient design methods. Platform-based design is a method...
Leandro Möller, Ismael Grehs, Ewerson Carvalh...
COMPUTER
2006
98views more  COMPUTER 2006»
15 years 6 months ago
Energy-Aware User Interfaces and Energy-Adaptive Displays
The utility of a mobile computer, such as a handheld or a laptop, is largely constrained by battery life. The display stands out as a major consumer of battery energy, so reducing...
Parthasarathy Ranganathan, Erik Geelhoed, Meera Ma...