Sciweavers

2433 search results - page 199 / 487
» Power laws in software
Sort
View
ICCD
2002
IEEE
70views Hardware» more  ICCD 2002»
16 years 3 months ago
Dynamic Loop Caching Meets Preloaded Loop Caching - A Hybrid Approach
Dynamically-loaded tagless loop caching reduces instruction fetch power for embedded software with small loops, but only supports simple loops without taken branches. Preloaded ta...
Ann Gordon-Ross, Frank Vahid
DATE
2003
IEEE
180views Hardware» more  DATE 2003»
15 years 12 months ago
Communication Centric Architectures for Turbo-Decoding on Embedded Multiprocessors
Software implementations of channel decoding algorithms are attractive for communication systems with their large variety of existing and emerging standards due to their flexibil...
Frank Gilbert, Michael J. Thul, Norbert Wehn
ISSS
1999
IEEE
87views Hardware» more  ISSS 1999»
15 years 11 months ago
Exploration and Synthesis of Dynamic Data Sets in Telecom Network Applications
We present a new exploration and optimization method to select customized implementations for dynamic data sets, as encountered in telecom network, database and multimedia applica...
Chantal Ykman-Couvreur, J. Lambrecht, Diederik Ver...
ISPASS
2009
IEEE
16 years 1 months ago
User- and process-driven dynamic voltage and frequency scaling
We describe and evaluate two new, independently-applicable power reduction techniques for power management on processors that support dynamic voltage and frequency scaling (DVFS):...
Bin Lin, Arindam Mallik, Peter A. Dinda, Gokhan Me...
EMSOFT
2010
Springer
15 years 4 months ago
Power-aware temporal isolation with variable-bandwidth servers
Variable-bandwidth servers (VBS) control process execution speed by allocating variable CPU bandwidth to processes. VBS enables temporal isolation of EDF-scheduled processes in th...
Silviu S. Craciunas, Christoph M. Kirsch, Ana Soko...