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» Power laws in software
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CASES
2008
ACM
15 years 8 months ago
Multiple sleep mode leakage control for cache peripheral circuits in embedded processors
This paper proposes a combination of circuit and architectural techniques to maximize leakage power reduction in embedded processor on-chip caches. It targets cache peripheral cir...
Houman Homayoun, Mohammad A. Makhzan, Alexander V....
CODES
2005
IEEE
15 years 8 months ago
An efficient direct mapped instruction cache for application-specific embedded systems
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
Chuanjun Zhang
CODES
2010
IEEE
15 years 4 months ago
A greedy buffer allocation algorithm for power-aware communication in body sensor networks
Monitoring human movements using wireless sensory devices promises to revolutionize the delivery of healthcare services. In spite of their potentials for many application domains,...
Hassan Ghasemzadeh, Roozbeh Jafari
STOC
2007
ACM
105views Algorithms» more  STOC 2007»
16 years 6 months ago
Balanced allocations: the weighted case
We investigate balls-and-bins processes where m weighted balls are placed into n bins using the "power of two choices" paradigm, whereby a ball is inserted into the less...
Kunal Talwar, Udi Wieder
CLUSTER
2009
IEEE
16 years 1 months ago
Scalable I/O forwarding framework for high-performance computing systems
—Current leadership-class machines suffer from a significant imbalance between their computational power and their I/O bandwidth. While Moore’s law ensures that the computatio...
Nawab Ali, Philip H. Carns, Kamil Iskra, Dries Kim...