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CASES
2010
ACM
15 years 4 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
CODES
2010
IEEE
15 years 4 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
ISCA
2007
IEEE
167views Hardware» more  ISCA 2007»
16 years 24 days ago
New cache designs for thwarting software cache-based side channel attacks
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike physical side channel attacks that mostly target embedded cryptographic devices,...
Zhenghong Wang, Ruby B. Lee
IFM
2004
Springer
175views Formal Methods» more  IFM 2004»
15 years 12 months ago
State/Event-Based Software Model Checking
Abstract. We present a framework for model checking concurrent software systems which incorporates both states and events. Contrary to other state/event approaches, our work also i...
Sagar Chaki, Edmund M. Clarke, Joël Ouaknine,...
DATE
2006
IEEE
95views Hardware» more  DATE 2006»
15 years 10 months ago
Satisfiability-based framework for enabling side-channel attacks on cryptographic software
- Many electronic systems contain implementations of cryptographic algorithms in order to provide security. It is well known that cryptographic algorithms, irrespective of their th...
Nachiketh R. Potlapally, Anand Raghunathan, Srivat...