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ISCAS
2005
IEEE
119views Hardware» more  ISCAS 2005»
16 years 3 days ago
Analysis of power consumption in VLSI global interconnects
Abstract— The analysis of effects induced by interconnects become increasingly important as the scale of process technologies steadily shrinks. While most analyses focus on the t...
Youngsoo Shin, Hyung-Ock Kim
ISLPED
2000
ACM
107views Hardware» more  ISLPED 2000»
15 years 11 months ago
Low power mixed analog-digital signal processing
The power consumption of mixed-signal systems featured by an analog front-end, a digital back-end, and with signal processing tasks that can be computed with multiplications and a...
Mattias Duppils, Christer Svensson
ASPDAC
2001
ACM
83views Hardware» more  ASPDAC 2001»
15 years 10 months ago
Trace-driven system-level power evaluation of system-on-a-chip peripheral cores
Our earlier work for fast evaluation of power consumption of general cores in a system-on-a-chip described techniques that involved isolating high-level instructions of a core, me...
Tony Givargis, Frank Vahid, Jörg Henkel
VLSID
2009
IEEE
119views VLSI» more  VLSID 2009»
16 years 7 months ago
Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems
Abstract-- Single-ended static random access memory (SESRAM) is well known for their tremendous potential of low active power and leakage dissipations. In this paper, we present a ...
Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhi...
GLOBECOM
2009
IEEE
16 years 1 months ago
Joint Power and Channel Resource Allocation for F/TDMA Decode and Forward Relay Networks
—In this paper, we study the joint power and channel resource allocation problem for a multiuser F/TDMA decodeand-forward (DF) relay network under per-node power constraints and ...
Yin Sun, Yuanzhang Xiao, Ming Zhao 0001, Xiaofeng ...