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ISCAS
2006
IEEE
84views Hardware» more  ISCAS 2006»
16 years 15 days ago
Power supply variation effects on timing characteristics of clocked registers
— Violations in the timing constraints of a clocked register can cause a synchronous system to malfunction. The effects of variations in the power supply voltage (VDD) on the tim...
William R. Roberts, Dimitrios Velenis
ICCD
2003
IEEE
89views Hardware» more  ICCD 2003»
15 years 11 months ago
Power-Time Tradeoff in Test Scheduling for SoCs
We present a test scheduling methodology for core-based system-on-chips that allows tradeoff between system power dissipation and overall test time. The basic strategy is to use t...
Mehrdad Nourani, James Chin
ISPDC
2003
IEEE
15 years 11 months ago
Hardware-based Power Management for Real-Time Applications
— This paper presents a new power management technique integrated into a multithreaded microcontroller with builtin real-time scheduling schemes. Power management is done by hard...
Sascha Uhrig, Theo Ungerer
DATE
1999
IEEE
81views Hardware» more  DATE 1999»
15 years 10 months ago
A Power Estimation Model for High-Speed CMOS A/D Converters
Power estimation is important for system-level exploration and trade-off analysis of VLSI systems. A power estimator for high-speed analog to digital converters that exploits info...
Erik Lauwers, Georges G. E. Gielen
CONNECTION
2002
82views more  CONNECTION 2002»
15 years 6 months ago
A model of absolute autonomy and power: toward group effects
We present a model of absolute autonomy and power in agent systems. This absolute sense of autonomy captures the agent's liberty over an agent's preferences. Our model ch...
Henry Hexmoor