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    VLSID
    2006
    IEEE
    140views VLSI» more  VLSID 2006»
    Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed (WPM) Routing
    16 years 6 months ago
    Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed (WPM) Routing
    Download  web.mit.edu
    A low power multilevel interconnect architecture that uses wave-pipelined multiplexed (WPM) interconnect routing is proposed in this paper. WPM takes advantage of existing interco...
    Ajay Joshi, Vinita V. Deodhar, Jeffrey A. Davis
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    DATE
    2009
    IEEE
    92views Hardware» more  DATE 2009»
    Power reduction of a 12-bit 40-MS/s pipeline ADC exploiting partial amplifier sharing
    16 years 21 days ago
    Power reduction of a 12-bit 40-MS/s pipeline ADC exploiting partial amplifier sharing
    Download  www.date-conference.com
    José Ángel Díaz-Madrid, H. Ne...
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    GLOBECOM
    2008
    IEEE
    98views Communications» more  GLOBECOM 2008»
    Multi-Way Pipelining for Power-Efficient IP Lookup
    16 years 12 days ago
    Multi-Way Pipelining for Power-Efficient IP Lookup
    Download  cial.csie.ncku.edu.tw
    Weirong Jiang, Viktor K. Prasanna
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    SLIP
    2004
    ACM
    63views Computer Networks» more  SLIP 2004»
    A low power approach to system level pipelined interconnect design
    15 years 11 months ago
    A low power approach to system level pipelined interconnect design
    Download  www.sliponline.org
    Vikas Chandra, Anthony Xu, Herman Schmit
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    ISLPED
    1996
    ACM
    143views Hardware» more  ISLPED 1996»
    Stage-skip pipeline: a low power processor architecture using a decoded instruction buffer
    15 years 10 months ago
    Stage-skip pipeline: a low power processor architecture using a decoded instruction buffer
    Download  www.cecs.uci.edu
    Mitsuru Hiraki, Raminder Singh Bajwa, Hirotsugu Ko...
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