Sciweavers

1238 search results - page 187 / 248
» Power Efficient Processor Architecture and The Cell Processo...
Sort
View
VLSID
2002
IEEE
192views VLSI» more  VLSID 2002»
15 years 11 months ago
Static and Dynamic Variable Voltage Scheduling Algorithms for Real-Time Heterogeneous Distributed Embedded Systems
à This paper addresses the problem of static and dynamic variable voltage scheduling of multi-rate periodic task graphs (i.e., tasks with precedence relationships) and aperiodic t...
Jiong Luo, Niraj K. Jha
PPOPP
2009
ACM
16 years 6 months ago
OpenMP to GPGPU: a compiler framework for automatic translation and optimization
GPGPUs have recently emerged as powerful vehicles for generalpurpose high-performance computing. Although a new Compute Unified Device Architecture (CUDA) programming model from N...
Seyong Lee, Seung-Jai Min, Rudolf Eigenmann
BMCBI
2010
139views more  BMCBI 2010»
15 years 6 months ago
A highly efficient multi-core algorithm for clustering extremely large datasets
Background: In recent years, the demand for computational power in computational biology has increased due to rapidly growing data sets from microarray and other high-throughput t...
Johann M. Kraus, Hans A. Kestler
SPAA
2010
ACM
15 years 11 months ago
Towards optimizing energy costs of algorithms for shared memory architectures
Energy consumption by computer systems has emerged as an important concern. However, the energy consumed in executing an algorithm cannot be inferred from its performance alone: i...
Vijay Anand Korthikanti, Gul Agha
VLSID
2002
IEEE
207views VLSI» more  VLSID 2002»
16 years 6 months ago
Synthesis of High Performance Low Power Dynamic CMOS Circuits
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
Debasis Samanta, Nishant Sinha, Ajit Pal