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APCSAC
2007
IEEE
16 years 19 days ago
Runtime Performance Projection Model for Dynamic Power Management
In this paper, a runtime performance projection model for dynamic power management is proposed. The model is built as a first-order linear equation using a linear regression model....
Sang Jeong Lee, Hae-Kag Lee, Pen-Chung Yew
LCTRTS
2007
Springer
16 years 13 days ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
MSWIM
2004
ACM
15 years 11 months ago
Detailed models for sensor network simulations and their impact on network performance
Recent trends in sensor network simulation can be divided between less flexible but accurate emulation based approach and more generic but less detailed network simulator models....
Maneesh Varshney, Rajive Bagrodia
ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
15 years 11 months ago
Re-architecting DRAM memory systems with monolithically integrated silicon photonics
The performance of future manycore processors will only scale with the number of integrated cores if there is a corresponding increase in memory bandwidth. Projected scaling of el...
Scott Beamer, Chen Sun, Yong-Jin Kwon, Ajay Joshi,...
MICRO
2009
IEEE
113views Hardware» more  MICRO 2009»
16 years 28 days ago
The BubbleWrap many-core: popping cores for sequential acceleration
Many-core scaling now faces a power wall. The gap between the number of cores that fit on a die and the number that can operate simultaneously under the power budget is rapidly i...
Ulya R. Karpuzcu, Brian Greskamp, Josep Torrellas