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ICS
2009
Tsinghua U.
16 years 1 months ago
Designing multi-socket systems using silicon photonics
Future single-board multi-socket systems may be unable to deliver the needed memory bandwidth electrically due to power limitations, which will hurt their ability to drive perform...
Scott Beamer, Krste Asanovic, Christopher Batten, ...
ISLPED
1998
ACM
86views Hardware» more  ISLPED 1998»
15 years 10 months ago
The energy complexity of register files
Register files (RF) represent a substantial portion of the energy budget in modern processors, and are growing rapidly with the trend towards wider instruction issue. The actual ...
Victor V. Zyuban, Peter M. Kogge
VEE
2010
ACM
327views Virtualization» more  VEE 2010»
16 years 1 months ago
AASH: an asymmetry-aware scheduler for hypervisors
Asymmetric multicore processors (AMP) consist of cores exposing the same instruction-set architecture (ISA) but varying in size, frequency, power consumption and performance. AMPs...
Vahid Kazempour, Ali Kamali, Alexandra Fedorova
EUROSYS
2010
ACM
16 years 3 months ago
A Comprehensive Scheduler for Asymmetric Multicore Systems
Symmetric-ISA (instruction set architecture) asymmetricperformance multicore processors were shown to deliver higher performance per watt and area for codes with diverse architect...
Juan Carlos Saez, Manuel Prieto Matias, Alexandra ...
ISCAS
2008
IEEE
141views Hardware» more  ISCAS 2008»
16 years 21 days ago
Reduced Z-datapath Cordic Rotator
In this article we propose a novel scheme based on virtually scaling-free COordinate Rotation DIgital Computer (CORDIC) algorithm to design a hardware efficient CORDIC rotator. Fo...
Koushik Maharatna, Karim El-Shabrawy, Bashir M. Al...