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ASAP
2003
IEEE
107views Hardware» more  ASAP 2003»
15 years 11 months ago
Energy Aware Register File Implementation through Instruction Predecode
The register file is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger dev...
José L. Ayala, Marisa Luisa López-Va...
DAC
2005
ACM
16 years 7 months ago
Energy optimal speed control of devices with discrete speed sets
We obtain analytically, the energy optimal speed profile of a generic multi-speed device with a discrete set of speeds, to execute a given task within a given time. Current implem...
Ravishankar Rao, Sarma B. K. Vrudhula
ICCD
2005
IEEE
165views Hardware» more  ICCD 2005»
16 years 3 months ago
Applying Resource Sharing Algorithms to ADL-driven Automatic ASIP Implementation
Presently, Architecture Description Languages (ADLs) are widely used to raise the abstraction level of the design space exploration of Application Specific Instruction-set Proces...
Ernst Martin Witte, Anupam Chattopadhyay, Oliver S...
ICCD
2008
IEEE
126views Hardware» more  ICCD 2008»
16 years 25 days ago
Accelerating search and recognition with a TCAM functional unit
Abstract— World data is increasing rapidly, doubling almost every three years[1][2]. To comprehend and use this data effectively, search and recognition (SR) applications will de...
Atif Hashmi, Mikko Lipasti
ISLPED
2006
ACM
100views Hardware» more  ISLPED 2006»
16 years 10 days ago
Selective writeback: exploiting transient values for energy-efficiency and performance
Today’s superscalar microprocessors use large, heavily-ported physical register files (RFs) to increase the instruction throughput. The high complexity and power dissipation of ...
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev,...