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VLDB
1998
ACM
180views Database» more  VLDB 1998»
15 years 10 months ago
Active Storage for Large-Scale Data Mining and Multimedia
The increasing performance and decreasing cost of processors and memory are causing system intelligence to move into peripherals from the CPU. Storage system designers are using t...
Erik Riedel, Garth A. Gibson, Christos Faloutsos
DAC
2008
ACM
16 years 7 months ago
Parallelizing CAD: a timely research agenda for EDA
The relative decline of single-threaded processor performance, coupled with the ongoing shift towards on chip parallelism requires that CAD applications run efficiently on paralle...
Bryan C. Catanzaro, Kurt Keutzer, Bor-Yiing Su
CC
2005
Springer
124views System Software» more  CC 2005»
15 years 12 months ago
Boosting the Performance of Multimedia Applications Using SIMD Instructions
Modern processors’ multimedia extensions (MME) provide SIMD ISAs to boost the performance of typical operations in multimedia applications. However, automatic vectorization suppo...
Weihua Jiang, Chao Mei, Bo Huang, Jianhui Li, Jiah...
TC
2010
15 years 1 months ago
A Counter Architecture for Online DVFS Profitability Estimation
Dynamic voltage and frequency scaling (DVFS) is a well known and effective technique for reducing power consumption in modern microprocessors. An important concern though is to est...
Stijn Eyerman, Lieven Eeckhout
DATE
2003
IEEE
127views Hardware» more  DATE 2003»
15 years 11 months ago
Exploring High Bandwidth Pipelined Cache Architecture for Scaled Technology
In this paper we propose a design technique to pipeline cache memories for high bandwidth applications. With the scaling of technology cache access latencies are multiple clock cy...
Amit Agarwal, Kaushik Roy, T. N. Vijaykumar