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DATE
2004
IEEE
154views Hardware» more  DATE 2004»
15 years 10 months ago
MultiNoC: A Multiprocessing System Enabled by a Network on Chip
The MultiNoC system implements a programmable onchip multiprocessing platform built on top of an efficient, low area overhead intra-chip interconnection scheme. The employed inter...
Aline Mello, Leandro Möller, Ney Calazans, Fe...
IPPS
2010
IEEE
15 years 4 months ago
Highly scalable parallel sorting
Sorting is a commonly used process with a wide breadth of applications in the high performance computing field. Early research in parallel processing has provided us with comprehen...
Edgar Solomonik, Laxmikant V. Kalé
DAC
2004
ACM
16 years 7 months ago
A novel approach for flexible and consistent ADL-driven ASIP design
Architecture description languages (ADL) have been established to aid the design of application-specific instruction-set processors (ASIP). Their main contribution is the automati...
Achim Nohl, Gunnar Braun, Hanno Scharwächter,...
JEC
2006
100views more  JEC 2006»
15 years 6 months ago
RC-SIMD: Reconfigurable communication SIMD architecture for image processing applications
During the last two decades, Single Instruction Multiple Data (SIMD) processors have become important architectures in embedded systems for image processing applications. The main ...
Hamed Fatemi, Bart Mesman, Henk Corporaal, Twan Ba...
AFRICACRYPT
2009
Springer
15 years 4 months ago
Efficient Acceleration of Asymmetric Cryptography on Graphics Hardware
Graphics processing units (GPU) are increasingly being used for general purpose computing. We present implementations of large integer modular exponentiation, the core of public-ke...
Owen Harrison, John Waldron