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CGO
2003
IEEE
15 years 11 months ago
Addressing Mode Selection
Many processor architectures provide a set of addressing modes in their address generation units. For example DSPs (digital signal processors) have powerful addressing modes for e...
Erik Eckstein, Bernhard Scholz
EMSOFT
2010
Springer
15 years 4 months ago
Energy-aware packet and task co-scheduling for embedded systems
A crucial objective in battery operated embedded systems is to work under the minimal power consumption that provides a desired level of performance. Dynamic Voltage Scaling (DVS)...
Luca Santinelli, Mauro Marinoni, Francesco Prosper...
ISCA
2006
IEEE
145views Hardware» more  ISCA 2006»
15 years 6 months ago
Techniques for Multicore Thermal Management: Classification and New Exploration
Power density continues to increase exponentially with each new technology generation, posing a major challenge for thermal management in modern processors. Much past work has exa...
James Donald, Margaret Martonosi
DELTA
2010
IEEE
15 years 11 months ago
Algorithm Transformation for FPGA Implementation
— High level hardware description languages aim to make hardware design more like programming software. These languages are often used to accelerate legacy software algorithms by ...
Donald G. Bailey, Christopher T. Johnston
ERSA
2008
92views Hardware» more  ERSA 2008»
15 years 7 months ago
Implementation of a Multi-Context FPGA Based on Flexible-Context-Partitioning
This paper presents a novel architecture to increase the hardware utilization in multi-context field programmable gate arrays (MC-FPGAs). Conventional MC-FPGAs use dedicated tracks...
Hasitha Muthumala Waidyasooriya, Masanori Hariyama...