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CISIM
2008
IEEE
16 years 27 days ago
Scheduling in Multiprocessor System Using Genetic Algorithms
Multiprocessors have emerged as a powerful computing means for running real-time applications, especially where a uniprocessor system would not be sufficient enough to execute all...
Keshav P. Dahal, M. Alamgir Hossain, Benny Varghes...
RECOSOC
2007
118views Hardware» more  RECOSOC 2007»
15 years 7 months ago
A NoC-based Infrastructure to Enable Dynamic Self Reconfigurable Systems
Electronic equipments with higher performance, lower power consumption, and smaller size motivate the research for more efficient design methods. Platform-based design is a method...
Leandro Möller, Ismael Grehs, Ewerson Carvalh...
HPCA
2002
IEEE
16 years 6 months ago
Evaluation of a Multithreaded Architecture for Cellular Computing
Cyclops is a new architecture for high performance parallel computers being developed at the IBM T. J. Watson Research Center. The basic cell of this architecture is a single-chip...
Calin Cascaval, José G. Castaños, Lu...
DATE
2010
IEEE
153views Hardware» more  DATE 2010»
15 years 5 months ago
Heterogeneous vs homogeneous MPSoC approaches for a Mobile LTE modem
— Applications like 4G baseband modem require single-chip implementation to meet the integration and power consumption requirements. These applications demand a high computing pe...
Camille Jalier, Didier Lattard, Ahmed Amine Jerray...
ICCAD
2003
IEEE
152views Hardware» more  ICCAD 2003»
16 years 3 months ago
Leakage Power Optimization Techniques for Ultra Deep Sub-Micron Multi-Level Caches
On-chip L1 and L2 caches represent a sizeable fraction of the total power consumption of microprocessors. In deep sub-micron technology, the subthreshold leakage power is becoming...
Nam Sung Kim, David Blaauw, Trevor N. Mudge