1238 search results - page 148 / 248 » Power Efficient Processor Architecture and The Cell Processo... |
170
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ICMCS
2009
IEEE
15 years 4 months ago
2009
IEEE
Parallel scalability allows an application to efficiently utilize an increasing number of processing elements. In this paper we explore a design space for parallel scalability for...
185
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VLSID
2002
IEEE
16 years 6 months ago
2002
IEEE
Among the many techniques for system-level power management, it is not currently possible to guarantee timing constraints and have a comprehensive system model at the same time. S...
195
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IPCCC
2006
IEEE
16 years 13 days ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
189
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ICS
2009
Tsinghua U.
15 years 11 months ago
2009
Tsinghua U.
ABSTRACT Because of technology advances power consumption has emerged up as an important design issue in modern high-performance microprocessors. As a consequence, research on redu...
162
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CODES
2005
IEEE
16 years 1 days ago
2005
IEEE
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...