Sciweavers

1238 search results - page 147 / 248
» Power Efficient Processor Architecture and The Cell Processo...
Sort
View
HPCA
2008
IEEE
16 years 6 months ago
Automated microprocessor stressmark generation
Estimating the maximum power and thermal characteristics of a processor is essential for designing its power delivery system, packaging, cooling, and power/thermal management sche...
Ajay M. Joshi, Lieven Eeckhout, Lizy Kurian John, ...
DATE
1998
IEEE
108views Hardware» more  DATE 1998»
15 years 10 months ago
Stream Communication between Real-Time Tasks in a High-Performance Multiprocessor
The demands in terms of processing performance, communication bandwidth and real-time throughput of many multimedia applications are much higher than today's processing archi...
Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin...
DAC
2004
ACM
16 years 7 months ago
Energy characterization of filesystems for diskless embedded systems
The need for low-power, small factor secondary storage device has led to the widespread use of flash memory in embedded systems. The energy consumption of processor and flash base...
Siddharth Choudhuri, Rabi N. Mahapatra
EUROPAR
2009
Springer
16 years 1 months ago
PSINS: An Open Source Event Tracer and Execution Simulator for MPI Applications
The size of supercomputers in numbers of processors is growing exponentially. Today’s largest supercomputers have upwards of a hundred thousand processors and tomorrow’s may ha...
Mustafa M. Tikir, Michael Laurenzano, Laura Carrin...
ACMMSP
2004
ACM
125views Hardware» more  ACMMSP 2004»
15 years 12 months ago
Improving trace cache hit rates using the sliding window fill mechanism and fill select table
As superscalar processors become increasingly wide, it is inevitable that the large set of instructions to be fetched every cycle will span multiple noncontiguous basic blocks. Th...
Muhammad Shaaban, Edward Mulrane