1238 search results - page 146 / 248 » Power Efficient Processor Architecture and The Cell Processo... |
143
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ICASSP
2011
IEEE
14 years 10 months ago
2011
IEEE
In this paper, we investigate the opportunities offered by floatingpoint arithmetics in enabling an assembly and intrinsics free highlevel language based development. We compare ...
175
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ISCA
2006
IEEE
16 years 13 days ago
2006
IEEE
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a ...
169
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IPPS
2008
IEEE
16 years 25 days ago
2008
IEEE
Packet classification is an important function in a router’s line-card. Although many excellent solutions have been proposed in the past, implementing high speed packet classifi...
172
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CODES
2001
IEEE
15 years 10 months ago
2001
IEEE
Comprehensive exploration of the design space parameters at the system-level is a crucial task to evaluate architectural tradeoffs accounting for both energy and performance const...
159
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CF
2006
ACM
16 years 12 days ago
2006
ACM
In this paper, we investigate the power implications of tile size selection for tile-based processors. We refer to this investigation as a tile granularity study. This is accompli...