1238 search results - page 134 / 248 » Power Efficient Processor Architecture and The Cell Processo... |
150
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IPPS
1999
IEEE
15 years 10 months ago
1999
IEEE
Clustering and scheduling of tasks for parallel implementation is a well researched problem. Several techniques have been presented in the literature to improve performance and re...
152
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VLSID
2008
IEEE
16 years 6 months ago
2008
IEEE
Technology scaling has resulted in an exponential increase in the leakage power as well as the variations in leakage power of fabricated chips. Functional units (FUs), like Intege...
162
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VLSID
2009
IEEE
16 years 7 months ago
2009
IEEE
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
164
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ESTIMEDIA
2003
Springer
15 years 11 months ago
2003
Springer
Recognizing speech, gestures, and visual features are important interface capabilities for embedded mobile systems. Perception algorithms have many traits in common with more conv...
173
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MICRO
1998
IEEE
15 years 10 months ago
1998
IEEE
Media applications are characterized by large amounts of available parallelism, little data reuse, and a high computation to memory access ratio. While these characteristics are p...