1238 search results - page 107 / 248 » Power Efficient Processor Architecture and The Cell Processo... |
164
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VISUALIZATION
1996
IEEE
15 years 10 months ago
1996
IEEE
A general volume rendering technique is described that efficiently produces images of excellent quality from data defined over irregular grids having a wide variety of formats. Re...
177
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DAC
2011
ACM
14 years 6 months ago
2011
ACM
SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
198
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BIBE
2008
IEEE
16 years 25 days ago
2008
IEEE
— The Smith-Waterman algorithm is a dynamic programming method for determining optimal local alignments between nucleotide or protein sequences. However, it suffers from quadrati...
180
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ICCD
1997
IEEE
15 years 10 months ago
1997
IEEE
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process. All previous work in parallel simulated annealing bas...
109
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ICMCS
2006
IEEE
16 years 11 days ago
2006
IEEE
This paper proposes a new architecture for efficient variable-length decoding (VLD) of entropy-coded data for multimedia applications on general-purpose processors. It improves o...