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ICCD
2008
IEEE
370views Hardware» more  ICCD 2008»
16 years 3 months ago
Simulation points for SPEC CPU 2006
— Increasing sizes of benchmarks make detailed simulation an extremely time consuming process. Statistical techniques such as the SimPoint methodology have been proposed in order...
Arun A. Nair, Lizy K. John
ICCD
2007
IEEE
132views Hardware» more  ICCD 2007»
16 years 3 months ago
Post-layout comparison of high performance 64b static adders in energy-delay space
Our objective was to determine the most energy efficient 64b static CMOS adder architecture, for a range of high-performance delay targets. We examine extensively carry-lookahead ...
Sheng Sun, Carl Sechen
ICCD
2007
IEEE
98views Hardware» more  ICCD 2007»
16 years 3 months ago
Evaluating voltage islands in CMPs under process variations
Parameter variations are a major factor causing powerperformance asymmetry in chip multiprocessors. In this paper, we analyze the effects of with-in-die (WID) process variations o...
Abhishek Das, Serkan Ozdemir, Gokhan Memik, Alok N...
ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
16 years 3 months ago
Reliability Support for On-Chip Memories Using Networks-on-Chip
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
Federico Angiolini, David Atienza, Srinivasan Mura...
ICCD
2006
IEEE
77views Hardware» more  ICCD 2006»
16 years 3 months ago
Iterative-Constructive Standard Cell Placer for High Speed and Low Power
Abstract— Timing and low power emerge as the most important goals in contemporary design. Meanwhile, the majority of placement algorithms developed by industry and academia still...
Sungjae Kim, Eugene Shragowitz
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