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304
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PODS
2000
ACM
15 years 11 months ago
2000
ACM
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192
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ARITH
1999
IEEE
15 years 11 months ago
1999
IEEE
The design and implementation of a double precision floating-point IEEE-754 standard adder is described which uses "flagged prefix addition" to merge rounding with the s...
136
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ARITH
1999
IEEE
15 years 11 months ago
1999
IEEE
A new IEEE compliant floating-point rounding algorithm for computing the rounded product from a carry-save representation of the product is presented. The new rounding algorithm i...
195
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ARITH
1999
IEEE
1999
IEEE
Correctness Proofs Outline for Newton-Raphson Based Floating-Point Divide and Square Root Algorithms
15 years 11 months ago
This paper describes a study of a class of algorithms for the floating-point divide and square root operations, based on the Newton-Raphson iterative method. The two main goals we...
146
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ARITH
1999
IEEE
15 years 11 months ago
1999
IEEE
The floating-point unit of a S/390 CMOS microprocessor is described. It contains a 116 bit fraction dataflow for addition and subtraction and a 64 bit-wide multiplier. Besides the...